Title: Questions about AI accelerator support and stacking Axon boards

General
1

Hello Vicharak Team

I had two questions about using the Vicharak Axon for AI/compute projects.

1. AI accelerator module support

Can we use an M.2 / PCIe AI accelerator module with the Vicharak Axon board?

For example, something like an M.2 AI accelerator card such as the MemryX MX3, or similar modules.

I wanted to understand:

  • Does Axon support AI accelerator modules through the M.2 / PCIe slot?
  • Is the M.2 slot only for NVMe storage, or can it support other PCIe devices too?
  • Are there any power, driver, kernel, or software limitations I should know about?
  • If the M.2 slot is used for an accelerator, what is the best way to handle storage or boot?

2. Stacking or connecting two Axon boards

Can we connect or “stack” two Axon boards together and distribute compute tasks between them?

For example, like Raspberry Pi cluster setups, where multiple Raspberry Pi boards are stacked in one enclosure and connected using Ethernet/networking. Each board runs separately, but the workload can be shared using software like Docker, Kubernetes, MPI, or custom scripts.

Can something similar be done with two Axon boards?

Also, any suggestions for the physical setup would be helpful, like:

  • how to mount both boards,
  • cooling and airflow,
  • power supply,
  • cable management,
  • and whether a 3D-printed, acrylic, or metal enclosure would be better.

Thanks!

2

We have tried various hailo-8l AI accelerator card via PCIe m.2 slot and it worked fine on axon, so it can handle both ssd and different devices provided that the device maker provide driver to run on aarch64 based devices for the os you are using.
EMMC (32GB inbuilt on axon) is best way for boot and storing OS / application softwares. For large model files or applications that require more space, you can extend storage using micro sd card (slot present on axon) or pendrive.

Though stacking / clustering axon should be possible, but there is no already existing example and complexity varies on how much low latency communication is acceptable to you and how you want to distribute the workload. If you are thinking about running a single model file across two axons to reduce latency, then it might not be possible with existing official SDKs and toolkits provided by rockchip (but there are few reverse-engineered SDKs which might help). However, different models can be easily run on different axons, synchronised by software or multiple instances of same model also can be run on multiple axon thus giving higher throughput.

3

It has been sorted out.
Closing this.